; generated by Component: ARM Compiler 5.06 update 5 (build 528) Tool: ArmCC [4d3621]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\board_init.o --asm_dir=.\Obj\ --list_dir=.\Obj\ --depend=.\obj\board_init.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I. -I.\Core_CM3 -IC:\Keil\ARM\RV31\INC -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\INC\NXP -D__UVISION_VERSION=524 --omf_browse=.\obj\board_init.crf board_init\board_init.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  init_PLL PROC
;;;17     
;;;18     void init_PLL(void)
000000  4827              LDR      r0,|L1.160|
;;;19     {
000002  b510              PUSH     {r4,lr}
;;;20       // disconnect PLL0
;;;21       LPC_SC->PLL0CON &= ~0x02;
000004  f8d01080          LDR      r1,[r0,#0x80]
000008  f0210102          BIC      r1,r1,#2
00000c  f8c01080          STR      r1,[r0,#0x80]
;;;22       // feed
;;;23       LPC_SC->PLL0FEED = 0xAA;
000010  22aa              MOVS     r2,#0xaa
000012  f8c0208c          STR      r2,[r0,#0x8c]
;;;24       LPC_SC->PLL0FEED = 0x55;
000016  2155              MOVS     r1,#0x55
000018  f8c0108c          STR      r1,[r0,#0x8c]
;;;25     
;;;26       // disable PLL0
;;;27       LPC_SC->PLL0CON = 0x00;
00001c  2300              MOVS     r3,#0
00001e  f8c03080          STR      r3,[r0,#0x80]
;;;28       // feed
;;;29       LPC_SC->PLL0FEED = 0xAA;
000022  f8c0208c          STR      r2,[r0,#0x8c]
;;;30       LPC_SC->PLL0FEED = 0x55;
000026  f8c0108c          STR      r1,[r0,#0x8c]
;;;31     
;;;32       // enable main oscillator, 1MHz - 20MHz
;;;33       LPC_SC->SCS = 0x20;
00002a  2320              MOVS     r3,#0x20
00002c  f8c031a0          STR      r3,[r0,#0x1a0]
                  |L1.48|
;;;34       // wait until ready
;;;35       while (!(LPC_SC->SCS >> 6 & 0x1));
000030  f8d031a0          LDR      r3,[r0,#0x1a0]
000034  099b              LSRS     r3,r3,#6
000036  07db              LSLS     r3,r3,#31
000038  d0fa              BEQ      |L1.48|
;;;36       // select main oscillator (10MHz) as input for PLL0
;;;37       LPC_SC->CLKSRCSEL = 0x01;
00003a  2301              MOVS     r3,#1
00003c  f8c0310c          STR      r3,[r0,#0x10c]
;;;38     
;;;39       // configure PLL0
;;;40       LPC_SC->PLL0CFG = (PLL_NSEL << 16) | PLL_MSEL;
000040  4c18              LDR      r4,|L1.164|
000042  f8c04084          STR      r4,[r0,#0x84]
;;;41       // feed
;;;42       LPC_SC->PLL0FEED = 0xAA;
000046  f8c0208c          STR      r2,[r0,#0x8c]
;;;43       LPC_SC->PLL0FEED = 0x55;
00004a  f8c0108c          STR      r1,[r0,#0x8c]
;;;44     
;;;45       // enable PLL0
;;;46       LPC_SC->PLL0CON = 0x01;
00004e  f8c03080          STR      r3,[r0,#0x80]
;;;47       // feed
;;;48       LPC_SC->PLL0FEED = 0xAA;
000052  f8c0208c          STR      r2,[r0,#0x8c]
;;;49       LPC_SC->PLL0FEED = 0x55;
000056  f8c0108c          STR      r1,[r0,#0x8c]
;;;50     
;;;51       // set CPU clock divider - CCLK = 70MHz
;;;52       LPC_SC->CCLKCFG = CCLK_DIV;
00005a  2303              MOVS     r3,#3
00005c  f8c03104          STR      r3,[r0,#0x104]
                  |L1.96|
;;;53     
;;;54       // wait for lock
;;;55       while (!((LPC_SC->PLL0STAT >> 26) & 0x1));
000060  f8d04088          LDR      r4,[r0,#0x88]
000064  0ea4              LSRS     r4,r4,#26
000066  07e4              LSLS     r4,r4,#31
000068  d0fa              BEQ      |L1.96|
;;;56     
;;;57       // connect PLL0
;;;58       LPC_SC->PLL0CON = 0x03;
00006a  f8c03080          STR      r3,[r0,#0x80]
;;;59       // feed
;;;60       LPC_SC->PLL0FEED = 0xAA;
00006e  f8c0208c          STR      r2,[r0,#0x8c]
;;;61       LPC_SC->PLL0FEED = 0x55;
000072  f8c0108c          STR      r1,[r0,#0x8c]
;;;62     
;;;63       // wait for connected
;;;64       while (!((LPC_SC->PLL0STAT >> 25) & 0x1));
000076  bf00              NOP      
                  |L1.120|
000078  f8d01088          LDR      r1,[r0,#0x88]
00007c  0e49              LSRS     r1,r1,#25
00007e  07c9              LSLS     r1,r1,#31
000080  d0fa              BEQ      |L1.120|
;;;65     }
000082  bd10              POP      {r4,pc}
;;;66     
                          ENDP

                  init_MAM PROC
;;;67     void init_MAM(void)
000084  4770              BX       lr
;;;68     {
;;;69     }
;;;70     
                          ENDP

                  init_PCB PROC
;;;71     void init_PCB(void)
000086  4770              BX       lr
;;;72     {
;;;73     }
;;;74     
                          ENDP

                  VectorsRemap PROC
;;;75     void VectorsRemap(void)
000088  4770              BX       lr
;;;76     {
;;;77     }
;;;78     
                          ENDP

                  board_init PROC
;;;79     void board_init(void)
00008a  b510              PUSH     {r4,lr}
;;;80     {
;;;81       init_PLL();
00008c  f7fffffe          BL       init_PLL
;;;82       Timer_init();
000090  f7fffffe          BL       Timer_init
;;;83     	// wait for PLL to complete initialization after POR
;;;84     	Timer_Delay(100);
000094  e8bd4010          POP      {r4,lr}
000098  2064              MOVS     r0,#0x64
00009a  f7ffbffe          B.W      Timer_Delay
;;;85     	init_MAM();
;;;86     	init_PCB();
;;;87     	VectorsRemap();
;;;88     }
                          ENDP

00009e  0000              DCW      0x0000
                  |L1.160|
                          DCD      0x400fc000
                  |L1.164|
                          DCD      0x0005003f
